Intel MAX 10 FPGA, Part #10M02SCU169A7G | FPGA | DEX
Intel MAX 10 FPGA, Part #10M02SCU169A7G | FPGA | DEX
-70% Off$55.50
Description
Intel MAX 10 FPGA, Part #10M02SCU169A7G | FPGA | DEX
Features
- VIN range: 0 V ≤ VIN ≤ 1.85 V.
- RL range: 90 ≤ RL ≤ 110 Ω.
- Low VOD setting is only supported for RSDS standard.
- No fixed VIN , VOD , and VOS specifications for Bus LVDS (BLVDS).
- They are dependent on the system topology. Mini-LVDS, RSDS, and Point-to-Point Differential Signaling (PPDS) standards are only supported at the output pins for Intel MAX 10 devices.
- Supported with requirement of an external level shift. Sub-LVDS input buffer is using 2.5 V differential buffer.
- Differential output depends on the values of the external termination resistors. Differential output offset voltage depends on the values of the external termination resistors.
ITL:10M02SCU169A7G
10M02SCU169A7G
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