DESCRIPTION

The Broadcom® BCM56450 is purpose-built for next generation Carrier Ethernet EAdvance Data Sheetdge and Mobile Backhaul platforms. It combines a feature-rich packet processing engine, integrated hierarchical traffic manager, deep external packet buffer, address management, and a non-blocking switch fabric into a single 40 nm CMOS device. The BCM56450 supports an integrated packet buffer with an external packet buffer expansion option, utilizing economical DDR3 SDRAM technology. The BCM56450 is capable of handling L2 switching, L3 routing, metro VPN tunneling, and access control lists (ACLs). The BCM56450 virtualized architecture enables seamless support for VPLS, VPWS, MPLS-TP, PBB, and PBB-TE tunneling. In addition, the BCM56450 supports internal processing of Ethernet OAM and BFD to enable a complete host CPU offload for these functions.

The BCM56450 has three ContentAware™ processors distributed throughout various stages of the pipeline to allow actions to be taken based on various matching criteria.The device complies with IEEE 802.3, IEEE 802.3u, IEEE 802.3ab, and IEEE 802.3x specifications. It incorporates 10 flex XAUI cores, each core provides up to 4x 1GbE, 4x 2.5GbE, or 1x 10GbE. Within the 10 flex XAUI cores, there are up to four stacking ports that can be configured as HiGig2 stacking ports. Multiple BCM56450 devices can be connected together using the stacking links to create high port density systems. The BCM56450 supports flexible Quality of Service (QoS), including IEEE 802.1p and DiffServ/TOS. Up to 64K MAC addresses, 4K VLANs, STP, and IEEE 802.1x MAC security are supported. The device integrates a dual-core ARM Cortex A9 processor running at 1 GHz to allow a complete solution to be developed without an external host processor. The device also provides a two-lane PCI Express interface that can be configured to operate as a Root Complex or EndPoint.